Lectures on Computer Architecture

A Comprehensive Guide by Dr. Isuru Nawinne

About Lectures on Computer Architecture

By Dr. Isuru Nawinne

This lecture series provides a comprehensive guide to computer architecture, covering topics from fundamental abstractions to advanced concepts in processor design, memory systems, and multiprocessing. Each lecture includes detailed notes, diagrams, and examples to support your learning journey.

Publishing Info

© 2025, by Creative Commons. This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International.
To view a copy of this license, visit https://creativecommons.org/licenses/by-nc/4.0/ or send a letter to Creative Commons, PO Box 1866, Mountain View, CA 94042, USA.
This license allows reusers to distribute, remix, adapt, and build upon the material in any medium or format, so long as attribution is given to the creator. The license allows only for non-commercial use.

Title: Lectures on Computer Architecture

Author: Dr. Isuru Nawinne

Institution: Department of Computer Engineering, University of Peradeniya

ISBN: 978-624-92913-1-7

ISBN 978-624-92913-1-7 Barcode

Preface

Computer architecture sits at the heart of modern computing. It is the discipline that reveals how machines execute instructions, manage data, and achieve programmability...

Computer architecture sits at the heart of modern computing. It is the discipline that reveals how machines execute instructions, manage data, and achieve programmability- bridging the conceptual world of algorithms and the physical realities of hardware. Over many years of teaching this subject to undergraduate students, I have found that curiosity grows not only from understanding what computers do, but from discovering how they do it and why they're designed that way.

This book, Lectures on Computer Architecture, is built upon the lecture series delivered to undergraduate cohorts. Each section distills core ideas, clarifies subtle concepts, and connects theory to the practical systems. The video lectures grew from classroom sessions, refined through questions, discussions, and repeated teaching experience. The accompanying notes are designed to complement the videos rather than duplicate it, offering multiple modalities through which students can explore the subject.

My goal is to provide a learning resource that is rigorous yet approachable, structured yet flexible, and suitable for both guided instruction and independent study. Whether used as a primary course text, or a guide for self-study, I hope this book supports students in creating a solid cognitive model of how computers are built.

I am grateful to all my students over the years whose questions and feedback helped refine these explanations, and to everyone who encouraged the development of a resource that unifies both lecture and text. It is my hope that this book helps you to see computer architecture not merely as a subject to be completed, but as a foundation for understanding the modern machines that shape our world.

I would like to convey my sincere appreciation to Dr. Kisaru Liyanage and Dr. Swarnalatha Radhakrishnan for their valuable contributions in delivering selected lectures. My profound thanks go to Kanishka Gunawardana and Sanka Peeris, for helping me edit this book and setting up the interactive web version. Their careful attention to detail, thoughtful feedback, and commitment to ensuring the clarity and accuracy have contributed greatly to the quality and reliability of this work.

Isuru Nawinne
Senior Lecturer in Computer Engineering

Learning Methods

This book is designed to support active, independent, and flexible learning, aligning closely with flipped learning and self-directed study practices...

This book is designed to support active, independent, and flexible learning, aligning closely with flipped learning and self-directed study practices.

The flipped-learning approach encourages students to engage with key concepts before coming to class or attempting exercises. Each section in this book includes a corresponding video lecture that introduces the fundamental ideas, explains core mechanisms, and walks through examples. Watching the video beforehand allows learners to arrive at discussions or problem-solving sessions better prepared, able to ask informed questions, and ready to dive deeper.

Flipped-learning transforms the role of classroom or study time: instead of passively receiving information, students actively seek and apply it. With multiple modalities of the videos as the initial exposure and the book as a reference and reinforcement tool, learners can use their interactive time: whether in discussions; tutorials; labs; or group study; to focus on reasoning, analysis, and synthesis.

Computer architecture is a subject that rewards curiosity and exploration. To support self-directed learning, each chapter is structured so students can progress at their own pace. The notes are carefully layered. They begin with foundational principles and incrementally build toward more advanced ideas.

Students are encouraged to:

  • Watch the video lectures as many times as needed to internalize concepts;
  • Revisit diagrams and derivations to strengthen visual and mathematical intuition;
  • Use end-of-section summaries and conceptual checkpoints to evaluate their understanding; and
  • Make connections between topics - for example, how pipelining interacts with branching, or how memory hierarchy influences performance.

This style of learning builds autonomy, critical thinking, and long-term retention—key skills for an engineer.

Introduction

This book follows a gradual progression from fundamental concepts to advanced architectural mechanisms, mirroring the structure of the lecture series...

This book follows a gradual progression from fundamental concepts to advanced architectural mechanisms, mirroring the structure of the lecture series. The material is organized into twenty sections, each corresponding to a major topic typically covered in an undergraduate computer architecture course.

How the Book Is Organized

The first set of chapters: Computer Abstractions, Technology Trends, and Performance establish the context and quantitative foundation needed to reason about architectural decisions. These are followed by chapters on Assembly Language Programming, Number Representation, Branching, Function Calls, and Memory Access which build the low-level understanding of how instructions operate.

Midway through the book, the focus shifts to the execution engine itself: Microarchitecture, Datapath, Control, and the progression from Single-Cycle Execution to Pipelined Processors. The chapters such as Pipeline Analysis help students understand real-world engineering challenges.

The later sections explore the memory subsystem in depth: Memory Hierarchy, Caching, Direct Mapped and Associative Cache Control, Multi-Level Caches, and Virtual Memory, before extending the architectural view to Multiprocessors, Storage, and Interfacing.

Each chapter includes:

  • A complete video lecture that introduces and explains concepts
  • Written notes highlighting definitions, diagrams, examples, and reasoning steps
  • Clarifications of common misconceptions
  • Connections to earlier and later material
  • Guidance on how the topic relates to real processors and modern systems

How to Use the Videos and Notes

The recommended learning sequence is:

  1. Start with the video lecture to gain an intuitive, big-picture understanding.
  2. Read the notes from the corresponding chapter to clarify details, solidify concepts, and explore more formal explanations.
  3. Revisit the video or specific parts of the chapter if some ideas feel unclear—the two formats reinforce each other.
  4. Use diagrams and worked examples as anchors for your understanding; architecture is highly visual and spatial.
  5. Progress through sections sequentially, as many topics build directly on earlier ones.

For review, you may find it helpful to skim chapter summaries and rewatch short segments of the videos rather than re-reading entire chapters.

Companion Guide for Practicals

Students' Guide to Practicals on Computer Architecture

Hands-on practical series to complement the lecture series, providing practical experience in processor microarchitecture and memory systems using Verilog. Students build their own processors and implement memory hierarchy with caching.

Publishing Info

© 2025, by Creative Commons. This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International.
To view a copy of this license, visit https://creativecommons.org/licenses/by-nc/4.0/ or send a letter to Creative Commons, PO Box 1866, Mountain View, CA 94042, USA.
This license allows reusers to distribute, remix, adapt, and build upon the material in any medium or format, so long as attribution is given to the creator. The license allows only for non-commercial use.

Title: Practicals on Computer Architecture

Lab Coordinator: Dr. Isuru Nawinne

Institution: Department of Computer Engineering, University of Peradeniya

ISBN: 978-624-92913-0-0

ISBN Barcode

Lecture Notes

Click on any lecture to view the detailed notes and diagrams.

Foundations

01

Computer Abstractions

By Dr. Isuru Nawinne

Introduction to the lecture series on Computer Architecture. This lecture introduces the fundamental concepts of computer system abstractions and the relationship between hardware and software.

02

Technology Trends

By Dr. Isuru Nawinne

This lecture covers the historical development of computer technology, Moore's Law, technology scaling trends, the power wall problem, the shift to multi-core processors, and how programs are compiled and executed in computer systems.

03

Understanding Performance

By Dr. Isuru Nawinne

This lecture provides a comprehensive exploration of performance concepts in computer systems, including response time, throughput, CPU time, clock cycles, CPI (Cycles Per Instruction), and Amdahl's Law.

Programming Concepts

04

Introduction to ARM Assembly

By Dr. Kisaru Liyanage

This lecture provides an introduction to ARM Assembly language programming, and covers the core concept of computer instructions. By Dr. Kisaru Liyanage.

05

Number Representation and Instruction Encoding

By Dr. Kisaru Liyanage

This lecture covers the number representation in an ARM CPU, and introduces data processing instructions for arithmetic and logic operations.

06

Branching

By Dr. Kisaru Liyanage

This lecture introduces branch instructions and flow control in an ARM Assembly programs.

07

Function Call and Return

By Dr. Kisaru Liyanage

This lecture covers function calling conventions in ARM, and stack management.

08

Memory Access

By Dr. Kisaru Liyanage.

This lecture covers loading data from memory, storing data to memory, and the build process of an assembly program.

Processor Architecture

09

Microarchitecture and Datapath

By Dr. Isuru Nawinne

This lecture introduces processor microarchitecture, focusing on implementing the MIPS ISA through hardware design. The lecture covers MIPS instruction types, basic digital logic review, datapath construction, and single-cycle processor design.

10

Processor Control

By Dr. Isuru Nawinne

This lecture covers the design of the control unit for a MIPS processor, with specific focus on generating ALU control signals through a two-stage approach. The lecture builds upon the datapath elements covered previously and demonstrates how control signals are generated from instruction opcodes and function fields.

11

Single-Cycle Execution

By Dr. Isuru Nawinne

This lecture completes the single-cycle MIPS processor design by analyzing control signals for all instruction types (R-type, Branch, Load, Store, Jump), introduces timing analysis with delay values, and demonstrates performance limitations that motivate multi-cycle and pipelined implementations.

12

Pipelined Processors

By Dr. Isuru Nawinne

This lecture introduces pipelining as a performance enhancement technique for MIPS processors, explains the concept using real-world analogies, analyzes the three types of hazards (structural, data, and control) that impede pipelining efficiency, and discusses solutions including forwarding and branch prediction.

13

Pipeline Analysis

By Dr. Isuru Nawinne

This lecture provides an in-depth analysis of MIPS five-stage pipeline operation, introduces pipeline registers required between stages, examines load/store instruction execution cycle-by-cycle, discusses timing and delay considerations, and includes practical exercises on clock frequency calculation and pipeline optimization.

Memory Systems

14

Memory Hierarchy and Caching

By Dr. Isuru Nawinne

This lecture introduces memory systems, starting with historical context and transitioning into the fundamental concepts of cache memory and memory hierarchy.

15

Direct Mapped Cache Control

By Dr. Isuru Nawinne

This lecture continues the discussion on cache memory, focusing on detailed read and write operations in a direct-mapped cache, handling cache misses, and introducing write policies (specifically write-through). The lecture explores how the cache controller manages different access scenarios and maintains data consistency.

16

Associative Cache Control

By Dr. Isuru Nawinne

This lecture continues the discussion on caching, with a focus on associative caches and performance implications.

17

Multi-Level Caching

By Dr. Isuru Nawinne

This lecture discusses mutli level cache hierarchy implementations, and their performance considerations.

18

Virtual Memory

By Dr. Isuru Nawinne

This lecture introduces the concept of virtual memory in computer systems.

Advanced Topics

19

Multiprocessors

By Dr. Isuru Nawinne

This lecture introduces multiprocessing and different types of multiprocessor architectures./p>

20

Storage and Interfacing

By Dr. Swarnalatha Radhakrishnan

This lecture covers storage and interfacing design considerations in computer systems.

About the Author

Dr. Isuru Nawinne

Dr. Isuru Nawinne

Senior Lecturer, Department of Computer Engineering

"I have come to believe that a great teacher is a great artist, and that there are as few as there are any other great artists. Teaching might even be the greatest of the arts since the medium is the human mind and spirit." — John Steinbeck

Dr. Isuru Nawinne received his B.Sc. degree in Engineering from the University of Peradeniya, Sri Lanka (2011), and his Ph.D. in Computer Science and Engineering from the University of New South Wales, Sydney, Australia (2016). He teaches one of the best computer architecture foundational courses in the world, with materials and delivery methods that consistently produce impressive outcomes. His students often pursue PhD research at world renowned universities, and are regularly recruited by world-leading computer architecture companies including ARM and SiFive.