RV32IM Network on Chip Design and Implementation
Table of Contents
Introduction
Under extended features we designed a Network of Chip to interconnect 16 RV32IM CPU instances using a mesh network. Mesh network is used by the CPU instances to communicate with other CPU instances and to access the main memory through the memory controllers. Figure 1 shows the basic design of the NoC.
As shown in Figure 1, the main hardware components of the NoC,
- Nodes
- Routers
- Main memory
- Memory Controller
Overview of the Network on Chip
Team
Supervisors
- Dr. Isuru Navinna
- Dr. Mahanama Wickramasinghe