The Embedded Systems and Computer Architecture Laboratory (ESCAL) is a research group at the Department of Computer Engineering at the University of Peradeniya. The primary focus of the group is inclined towards micro-architectural design aspects of embedded microprocessors and their security and reliability concerns.
The group is led by Roshan Ragel and has continued collaborations with Professor Sri Parameswaran at the Embedded Systems Lab, School of Computer Science and Engineering, the University of New South Wales (UNSW), Sydney.
The group consists of the academic staff members of the Department of Computer Engineering, the Postgraduate (Ph.D., M.Phil., M.Eng., and M.Sc.) students from both the Department of Computer Engineering and the Postgraduate Institute of Science (PGIS), and the Undergraduate students from the Department of Computer Engineering and the Department of Statistics and Computer Science. The group also collaborates with the academic staff members, postdoctoral researchers and postgraduate students from the School of Computer Science and Engineering, UNSW. Roshan Ragel regularly visits UNSW, Sydney, as a visiting research fellow.
At present, the group works on the following themes:
- Security and Reliability of Embedded Systems
- Side-Channel Attacks and Countermeasures
- Application Specific Processor and Memory Hierarchy Design
- High-Performance Computing
Security and Reliability of Embedded Systems
The primary focus of this topic is on the security and reliability aspects of embedded microprocessors. That is, architecting and building microprocessors that can detect and project from security vulnerabilities, and also that can take care of the reliability concerns of the computing system. The theme also includes areas such as CAPTCHA (Completely Automated Public Turing test to tell Computers and Humans Apart) systems for mobile devices that are designed to prevent spams.
Present members/collaborators
- Dr. Roshan Ragel
- Prof. Sri Parameswaran (Professor, UNSW)
- Dr. Angelo Ambrose (Team Lead, Canon Information Systems Australia (CiSRA))
- Dr. Tuo Li (Postdoctoral Researcher, UNSW)
- Dr. Swarnalatha Radhakrishnan (Senior Lecturer, University of Peradeniya)
Past members/collaborators
- Roshan Wickramasinghe (UG Project Student)
- Akila Keerawella (UG Project Student)
- Ajitha Samarasinghe (UG Project Student)
- Chaminda Bulumulla (UG Thesis Student, Computer Science)
- Pramod Herath (UG Project Student)
- Upul Senanayake (UG Project Student)
- Kruthartha Patel (PhD Student @UNSW)
- Babak Saghaie (PhD Student @UNSW)
Recent Publications (2011 - )
- Roshan Wicramasingha, Akila Keerawella, Ajitha Samarasinghe and Roshan Ragel, RotateCAPTCHA: A Novel Interactive CAPTCHA Design Targeting Mobile Devices, in Proceedings of the 10th IEEE International Conference on Industrial and Information Systems 2015 (ICIIS'2015), Peradeniya, Sri Lanka, Dec 2015
- Bulumulla, C.B; Ragel, R.G, LineCAPTCHA mobile: A user-friendly replacement for unfriendly reverse Turing tests for mobile devices, Information and Automation for Sustainability (ICIAfS), 2014 7th International Conference on, pp.1,6, 22-24 Dec. 2014 [Best Paper Award - Intelligent Machines and Man-machine Co-existence]
- Roshan Ragel, Pramod Herath and Upul Senanayake, Authorship Detection of SMS Messages Using Unigrams, Eighth International Conference on Industrial & Information Systems (ICIIS 2013), December 2013, Kandy, Sri Lanka, IEEE, Kandy, Sri Lanka
- Babak Saghaie, Roshan Ragel, Sri Parameswaran and Aleks Ignjatovic, A Novel Intermittent Fault Markov Model for Deep Sub-Micron Processors, GLSVLSI 2013, Paris, France, May 2013
- Tuo Li, Muhammad Shafique, Semeen Rehman, Swarnalatha Radhakrishnan, Roshan Ragel, Jude Angelo Ambrose, Jorg Henkel and Sri Parameswaran, CSER: HW/SW Configurable Soft-Error Resiliency for Application Specific Instruction-Set Processors, Design, Automation and Test in Europe (DATE), March 2013
- Tuo Li, Roshan Ragel, Sri Parameswaran, RELI: A HW/SW Checkpoint and Recovery Scheme for Embedded Processors, in Proceedings of the Design, Automation and Test in Europe (DATE 2012) Conference, Dresdon, Germany, IEEE Press, pp. , March 2012
- K. Patel, S. Parameswaran and R.G. Ragel, Architectural Frameworks for Security and Reliability of MPSoCs, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 19(9): pp 1641-1654, September 2011.
- R.G. Ragel and S. Parameswaran, A Hybrid Hardware Software Technique to Improve Reliability in Embedded Processors, ACM Transactions on Embedded Computing Systems (TECS), 10.3, ACM New York, April 2011.
Side-Channel Attacks and Countermeasures
Side-channel attacks focus on the information leakage of a system via its side-channels to extract secret keys of the system. The group works on exploring new vulnerabilities of the systems and proposing countermeasures.
Present members/collaborators
- Dr. Roshan Ragel
- Prof. Sri Parameswaran (Professor, UNSW)
- Dr. Angelo Ambrose (Team Lead, Canon Information Systems Australia (CiSRA))
- Dr. Dhammika Elkaduwe (Senior Lecturer)
- Darshana Jayasinghe (PhD Student, UNSW)
- Hasindu Gamaarachchi (Instructor)
Past members/collaborators
- Bhanuka Bandara (UG Project Student)
- Udyani Herath (UG Thesis Student, Computer Science)
- Janaka Alawatugoda (UG Thesis Student, Computer Science)
- Jayani Fernando (UG Project Student)
- Ankita Arora (M.Sc. by Research Student, UNSW)
Recent Publications (2011 - )
- Hasindu Gamaarachchi, Bhanuka Bandara, and Roshan Ragel, The A to Z of Building a Testbed for Power Analysis Attacks, in Proceedings of the 10th IEEE International Conference on Industrial and Information Systems 2015 (ICIIS'2015), Peradeniya, Sri Lanka, Dec 2015.
- Hasindu Gamaarachchi, Harsha Ganegoda and Roshan Ragel, Testbed for Power Analysis Attack Based on the Arduino Prototyping Board, Proceedings of the Peradeniya University International Research Sessions 2015 (iPURSE15), University of Peradeniya, Sri Lanka, Nov. 2015.
- Darshana Jayasinghe, Angelo Ambrose, Roshan Ragel, Aleksandar Ignjatovic, Sri Parameswaran, QuadSeal: Quadruple Algorithmic Symmetrizing Countermeasure Against Power Based Side-channel Attacks, CASES 2015, Amsterdam, The Netherlands, October 2015.
- Jude Angelo Ambrose, Roshan G. Ragel, Darshana Jayasinghe, Tuo Li and Sri Parameswaran, Side Channel Attacks in Embedded Systems: A Tale of Hostilities and Deterrence, ISQED, Santa Clara, CA, USA, 2015
- Jayasinghe, D.; Ragel, R.; Ambrose, J.A.; Ignjatovic, A.; Parameswaran, S., Advanced modes in AES: Are they safe from power analysis based side channel attacks Computer Design (ICCD), 2014 32nd IEEE International Conference on , vol., no., pp.173,180, 19-22 Oct. 2014
- Udyani Herath, Janaka Alawatugoda and Roshan Ragel, Software Implementation Level Countermeasures against the Cache Timing Attack on Advanced Encryption Standard, Eighth International Conference on Industrial & Information Systems (ICIIS 2013), December 2013, Kandy, Sri Lanka, IEEE, Kandy, Sri Lanka
- Jude A. Ambrose, Roshan G. Ragel and Sri Parameswaran, Randomized Instruction Injection to Counter Power Analysis Attacks, ACM Transactions on Embedded Computing Systems. Volume 11 Issue 3, September 2012 ACM New York, NY, USA.
- Darshana Jayasinghe, Roshan Ragel and Dhammika Elkaduwe, Constant Time Encryption as a Countermeasure Against Remote Cache Timing Attack, 6th International Conference on Information and Automation for Sustainability (ICIAfS 12), 2012, Beijing, China, September 2012 (won one of the BEST PAPER AWARDS).
- Darshana Jayasinghe, Jayani Fernando, Roshan Ragel and Dhammika Elkaduwe, Constant Time Encryption as a Countermeasure Against Remote Cache Timing Attack, in Proceedings of the Peradeniya University Research Sessions (PURSE) 2011, Sri Lanka, Vol. 16, pp 120, November 2011.
- A. Arora, S. Parameswaran, R. G. Ragel and D. Jayasinghe, A Hardware/Software Countermeasure and a Testing Framework for Cache based Side Channel Attacks, in Proceedings of the 8th IEEE International Conference on Embedded Software and Systems (IEEE ICESS 2011), Changsha, China, November, 2011
- Janaka Alawatugoda, Roshan Ragel and Darshana Jayasinghe, Countermeasures Against Bernsteins Remote Cache Timing Attack, in Proceedings of the 6th International Conference on Industrial and Information Systems (ICIIS2011), pp 43-48, Kandy, Sri Lanka, August 2011.
- Jude A. Ambrose, Roshan G. Ragel, Sri Parameswaran and Aleksandar Ignjatovic, Multiprocessor Information Concealment Architecture to prevent Power Analysis based Side Channel Attacks, IET Transactions on Computers & Digital Techniques, Volume 5, Issue 1, pp 1-15, January 2011.
Application Specific Processor and Memory Hierarchy Design
This theme focusses on the high performance and low-cost design of processors and memory hierarchies. The application specific nature of embedded systems/processors is exploited to achieve the benefits of such designs. The design of the processor includes keywords such as System-on-Chip (SoC), Multiprocessor System-on-Chip (MPSoC), single and multiprocessor memory (cache) hierarchies.
Present members/collaborators
- Dr. Roshan Ragel
- Dr. Swarnalatha Radhakrishnan (Senior Lecturer)
- Prof. Sri Parameswaran (Professor, UNSW)
- Dr. Angelo Ambrose (Team Lead, Canon Information Systems Australia (CiSRA))
- Mr. Isuru Nawinne (PhD Student, UNSW)
- Dr. Haris Javaid (Google Inc.)
Past members/collaborators
- Rashmie Abeysinghe (UG Thesis Student, Computer Science)
- Nadiya Hassan (UG Thesis Student, Computer Science)
- Chaluka Salgado (UG Thesis Student, Computer Science)
- Mahanama Wickramasinghe (UG Project Student)
- Lawrance Zhang (PhD Student, UNSW)
- Dr. Jorgen Peddersen (Research Associate, UNSW)
- Mohammad Shihabul Haque (PhD Student, UNSW)
Recent Publications (2011 - )
- Isuru Nawinne, Haris Javaid, Roshan Ragel, Swarnalatha Radhakrishnan, and Sri Parameswaran, Exploring Multi-Level Cache Hierarchies in Application Specific MPSOCs, in Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 34, No. 12, pp. 1991 - 2003, Dec 2015
- Abeysinghe, T.M.R.L.B. ; Hassan, N. ; Ragel, R.G., A feasibility study on programmer specific instruction set processors, Information and Automation for Sustainability (ICIAfS), 2014 7th International Conference on, pp.1,6, 22-24 Dec 2014
- Salgado, M.G.G.C.R. ; Ragel, R.G., Register spilling for specific application domains in ASIPs, Information and Automation for Sustainability (ICIAfS), 2014 7th International Conference on, pp.1,6, 22-24 Dec 2014
- Lawrance Zhang, Jude Angelo Ambrose, Roshan Ragel, Swarnalatha Radhakrishnan, Jorgen Peddersen and Sri Parameswaran, DRMA: Dynamically Reconfigurable MPSoC Architecture, GLSVLSI 2013, Paris, France, May 2013
- Roshan Ragel, Jude Angelo Ambrose, Swarnalatha Radhakrishnan and Sri Parameswaran, A Study on Instruction-set Selection using Multi-application based Application Specific Instruction-set Processors, 26th International Conference on VLSI Design (VLSID 13), January 2013, Pune, India.
- Mohammad Shihabul Haque, Roshan Ragel, Angelo Ambrose, Swarnalatha Radhakrishnan and Sri Parameswaran, DIMSim: A Rapid Two-level Cache Simulation Approach for Deadline-based MPSoCs, International Conference on Hardware/Software Codesign and System Synthesis 2012, Tampere, Findland, October 2012
- Roshan Ragel, Swarnalatha Radhakrishnan and Angelo Ambrose, Instruction-set Selection for Multi-application Based ASIP Design: an Instruction-level Study, 6th International Conference on Information and Automation for Sustainability (ICIAfS 12), 2012, Beijing, China, September 2012.
- Isuru Nawinne, Mahanama Wickramasinghe, Roshan Ragel and Swarnalatha Radhakrishnan, Heterogeneous Processor Pipeline for a Product Cipher Application, in Proceedings of the 6th International Conference on Industrial and Information Systems (ICIIS2011), pp 32-37, Kandy, Sri Lanka, August 2011.
High-Performance Computing & NVIDIA Research Center
The primary focus of this theme is to accelerate the performance of a computing system with particular emphasis on embedded computer system. The work includes stimulating the different aspects of the complete span of a computing system, from algorithms to hardware modifications. The theme also includes the NVIDIA Research Center at the University of Peradeniya (http://tesla.ce.pdn.ac.lk), which focusses on using NVIDIA GPUs for high-performance computing.
Present members/collaborators
- Dr. Roshan Ragel
- Dr. Devapriya Dewasurendra (Senior Lecturer)
- Dr. Dhammika Elkaduwe (Senior Lecturer)
- Jiffriya Carder (MPhil Student, PGIS)
- Akmal Jahan (MPhil Student, PGIS)
- Hasindu Gamaarachchi (Instructor)
- Darshana Jayasinghe (PhD Student, UNSW)
- Sugandima Vidanagamachchi (PhD Student)
- Mahesan Niranjan (Professor, University of Southampton, UK)
- Vajira Thambawita (MPhil Student)
Past members/collaborators
- Nayomi Dayarathne (MSc Student, PGIS)
- Arudchutha Subramaniam (UG Project Student)
- Nishanthy Tharmakulasingam (UG Project Student)
- Pramitha Perera (UG Thesis Student, Computer Science)
- Upul Senanayake (UG Project Student)
- Arunan Sivanathan (UG Project Student)
- Charith Ellepola (UG Project Student)
- Rahal Prabuddha (UG Project Student)
- Angelo Barnes (UG Project Student)
- Ryan Fernando (UG Project Student)
- Kasuni Mettananda (UG Project Student)
- Damayanthi Herath (UG Project Student)
- Chathurika Lakmali (UG Project Student)
Recent Publications (2011 - )
- MAC Jiffriya, MAC Akmal Jahan, Hasindu Gamaarachchi, and Roshan Ragel, Accelerating Text Based Plagiarism Detection using GPUs, in Proceedings of the 10th IEEE International Conference on Industrial and Information Systems 2015 (ICIIS'15), Peradeniya, Sri Lanka, Dec 2015.
- Gamaarachchi, Hasindu ; Ragel, Roshan ; Jayasinghe, Darshana, Accelerating correlation power analysis using graphics processing units (GPUs), Information and Automation for Sustainability (ICIAfS), 2014 7th International Conference on, pp.1,6, 22-24 Dec. 2014
- Vidanagamachchi, S.M. ; Dewasurendra, S.D. ; Ragel, R.G. ; Niranjan, M., A structured hardware software architecture for peptide based diagnosis of Baylisascaris Procyonis infection, Information and Automation for Sustainability (ICIAfS), 2014 7th International Conference on, pp.1,6, 22-24 Dec. 2014
- Thambawita, D.R.V.L.B. ; Ragel, Roshan ; Elkaduwe, Dhammika, To use or not to use: Graphics processing units (GPUs) for pattern matching algorithms, Information and Automation for Sustainability (ICIAfS), 2014 7th International Conference on, pp.1,6, 22-24 Dec. 2014
- Dayarathne, Nayomi ; Ragel, Roshan, Accelerating Rabin Karp on a Graphics Processing Unit (GPU) using Compute Unified Device Architecture (CUDA), Information and Automation for Sustainability (ICIAfS), 2014 7th International Conference on, pp.1,6, 22-24 Dec. 2014
- Vidanagamachchi, Sugandima M. ; Devapriya Dewasurendra, S. ; Ragel, Roshan G. ; Niranjan, Mahesan, A structured hardware software architecture for peptide based diagnosis Sub-string matching problem with limited tolerance, Information and Automation for Sustainability (ICIAfS), 2014 7th International Conference on, pp.1,6, 22-24 Dec. 2014
- S. M. Vidanagamachchi, S. D. Dewasurendra, R.G. Ragel, Hardware Accelerated Protein Inference Framework, Eighth International Conference on Industrial & Information Systems (ICIIS 2013), December 2013, Kandy, Sri Lanka, IEEE, Kandy, Sri Lanka
- S. M. Vidanagamachchi, S. D. Dewasurendra, R.G. Ragel, Hardware Software Co-design of the Aho-Corasick Algorithm: Scalable for Protein Identification?, Eighth International Conference on Industrial & Information Systems (ICIIS 2013), December 2013, Kandy, Sri Lanka, IEEE, Kandy, Sri Lanka
- Arudchutha Subramaniam, Roshan Ragel, Nishanthy Tharmakulasingam, String Matching with Multicore CPUs: Performing Better with the Aho-Corasick Algorithm, Eighth International Conference on Industrial & Information Systems (ICIIS 2013), December 2013, Kandy, Sri Lanka, IEEE, Kandy, Sri Lanka
- Pramitha Perera and Roshan Ragel, Accelerating Motif Finding in DNA Sequences with Multicore CPUs, Eighth International Conference on Industrial & Information Systems (ICIIS 2013), December 2013, Kandy, Sri Lanka, IEEE, Kandy, Sri Lanka
- U. Senanayake, A. Sivanathan, R. G. Ragel, Evaluating a Data Level Parallelism Approach In Drug Discovery Research, Peradeniya University Research Sessions 2012, July 2013
- S.M. Vidanagamachchi, S.D. Dewasurendra, R.G. Ragel, M. Niranjan, Software Hardware Co-Design for Protein Identification, Peradeniya University Research Sessions 2012, July 2013
- D.R.V.L.B. Thambawita, N.C. Ellepola, R. G. Ragel, D. Elkaduwe, GPGPU: To Use or Not to Use?, Peradeniya University Research Sessions 2012, July 2013
- Upul Senanayake, Rahal Prabuddha and Roshan Ragel, Machine Learning based Search Space Optimisation for Drug Discovery, IEEE Symposium Series on Computational Intelligence, April 2013, Singapore
- S. M. Vidanagamachchi, S. D. Dewasurendra, R. G. Ragel, and M. Niranjan, Commentz-Walter: Any Better than Aho-Corasick for Peptide Identification?, International Journal of Research in Computer Science, Volume 2, Issue 5, pp. 33-37, White Globe Publications, November 2012
- Upul Senanayake, Rahal Prabuddha and Roshan Ragel, High Throughput Virtual Screening with Data Level Parallelism in Multi-core Processors, 6th International Conference on Information and Automation for Sustainability (ICIAfS 12), 2012, Beijing, China, September 2012.
- Angelo Barnes, Ryan Fernando, Kasuni Mettananda and Roshan Ragel, Improving the Throughput of the AES Algorithm with Multicore Processors, Seventh International Conference on Industrial and Information Systems (ICIIS 2012), pp. 1-6, August 2012, Chennai, India
- Damayanthi Herath, Chathurika Lakmali, Roshan Ragel, Accelerating String Matching for Biocomputing Applications on Multi-core CPUs, Seventh International Conference on Industrial and Information Systems (ICIIS 2012), August 2012, Chennai, India
- Sugandima Vidanagamachchi, Roshan Ragel, Devapriya Dewasurendra and Niranjan Mahesan, Tile Optimization for Area in FPGA Based Hardware Acceleration of Peptide Identification, in Proceedings of the 6th International Conference on Industrial and Information Systems (ICIIS2011), pp 140-145, Kandy, Sri Lanka, August 2011.
