CO213: Computer Architecture
| Course Number : CO213 | ||||||
|---|---|---|---|---|---|---|
| Course Title : Computer Architecture | ||||||
| Credits : 3 | ||||||
| Prerequisites : Logic Networks (CO211) | ||||||
| No | Course Content | Time Allocated (hours) | ||||
| L | T | P | A | |||
| 01 | Overview:
Difference between Computer Architecture and Computer Organization; Role of computer architecture in Computer Engineering | 1 | ||||
| 02 | Fundamentals of Computer Architecture:
Von Neumann machine organization, Instruction types and addressing modes, Subroutine call and return mechanisms, Instruction decoding and execution; Registers and register files; I/O techniques and interrupts | 2 | ||||
| 03 | Computer Arithmetic:
Integer arithmetic: Multiplication, Division, Significance of range, precision and accuracy; Floating-point arithmetic: Standard methods of representation, Addition, Subtraction, Multiplication, Division; Conversion between integer and floating-point numbers | 4 | 2 | 1 | ||
| 04 | CPU Organization:
Implementation of the von Neumann machine; Control and data paths, single vs. Multiple bus datapaths; Instruction set architecture, Implementing instructions; Register transfer notation, Conditional and unconditional transfers, ALU control; Control unit: hardwired vs. Micro-programmed realizations; Arithmetic units for multiplication and division; | 7 | 1 | 6 | 2 | |
| 05 | Pipelining:
Introduction to instruction level parallelism, Overview of pipelining, Pipelined data paths and control, Pipeline hazards: structural, data and control hazards, forwarding, stalls; Reducing the effect of hazards | 4 | ||||
| 06 | Memory hierarchies:
Memory systems hierarchy, Electronic, magnetic and optical technologies; Main memory organization, latency, cycle-time, bandwidth and interleaving; Cache memories: Address mapping, line size, replacement and write-back policies; Virtual memory, page faults, TLBs, protection | 5 | 1 | 5 | 2 | |
| 07 | Interfacing and communication:
I/O fundamentals: Types and characteristics of I/O devices, handshaking, buffering; Buses: types of buses, synchronous and asynchronous buses, bus masters and slaves, bus arbitration, bus standards; programmed I/O, interrupt driven I/O, Interrupt structures: vectored and prioritized, interrupt overhead; Direct memory access | 4 | 7 | 1 | ||
| 08 | Performance issues:
Metrics for computer performance, clock rate, MIPS, Cycles per instruction, benchmarks, limitations of performance metrics | 2 | ||||
| 09 | Trends in computer architecture:
CISC, RISC, VLIW | 1 | ||||
| Total | 30 | 2 | 20 | 6 | ||
| Assessment | Percentage Marks | |||||
| Continuous Assessment | 40 | |||||
| Tutorials | ||||||
| Practical work | ||||||
| Assignments | ||||||
| Written Examinations | 60 | |||||
| Mid-semester | ||||||
| End-semester | ||||||