RISC-V SoC With Neuromorphic Accelerator for SNNs

Team

Supervisors

Table of content

  1. Abstract
  2. Related works
  3. Methodology
  4. Experiment Setup and Implementation
  5. Results and Analysis
  6. Conclusion
  7. Publications
  8. Links

Abstract

This project focuses on designing a RISC-V SoC integrated with a Neuromorphic Accelerator for small-scale Spiking Neural Network (SNN) applications. The RISC-V processor manages the accelerator to enable low-power, low-latency edge computing. This system is aimed at providing efficient, real-time AI capabilities for embedded systems and edge devices, ideal for neuromorphic processing.

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Methodology

[Content will be added here based on methodology and design.]

Experiment Setup and Implementation

[Details about the experimental setup and implementation will be described here.]

Results and Analysis

[Results, performance measurements, and analysis will be included here.]

Conclusion

[Conclusion summarizing findings, contributions, and future work will be included here.]

Publications